Design Verification Engineer // San Jose, CA (Remote ) // long Term // EXP -8+

Your Headline: Focused and to the point [A short update like this is great for getting your point across quickly. Don't waste time on introductions:

Your Headline: Focused and to the point [A short update like this is great for getting your point across quickly. Don't waste time on introductions: Say what you have to say. It doesn't have to read like a telegram — be friendly and funny, but keep it to just one paragraph if you can.] Job Title - Design Verification Engineer Location - San Jose, CA (Remote ) Duration – long Term EXP -8+ Job Description: Mandatory Experience: •Writing and maintaining test plans •Creating and maintaining UVM testbenches •Created a module testbench from scratch •Written Cover points, Assertions (SVA) and closed coverage •Knowledge of standard bus protocols such as AHB, AXI, etc. Desirable Experience: •Scripting and test automation for regression •Experience with PCIe/NVM and/or ONFI •Experience with SSD architecture Education Requirements: •BS/MS in EE/CE, plus 5+ years of Design Verification experience •Familiarity with ASIC, Computer and Embedded Systems Architectures •Excellent oral and written communication skills with people at all levels, a must. •Team player, with excellent debugging skills Thanks & Regards Anurag Sharma Technical Recruiter Email: anurag.s@emonics.com Phone: +1 201 987 1804 – EXT: 5305 1260 Centennial Ave, Suite 1A, Piscataway, NJ- 08854 ©2023 Emonics LLC | Anurag Sharma Technical Recruiter Email: anurag.s@emonics.com Phone: +1 201 987 1804 – EXT: 5305 1260 Centennial Ave, Suite 1A, Piscataway, NJ- 08854 Web Version   Preferences   Forward   Unsubscribe     Powered by Mad Mimi®A GoDaddy® company